News What is RISC-V and what does it mean for Android and Wear OS?

Compared to a CISC (Complex Instruction Set Computer) design like ARM, the platform used in things like your phone or your smartwatch, a RISC processor needs more individual instructions, but each is done very fast.
Ummm, ARM isn't a CISC architecture. ARM originally stood for Acorn RISC Machine, now it stands for Advanced RISC Machine.

ARM has a whole page on the benefits of its RISC architecture vs. traditional CISC designs:

Even when you click the ARM link in the original quote, it leads to AC's page on ARM that calls ARM a RISC architecture...
 
Ummm, ARM isn't a CISC architecture. ARM originally stood for Acorn RISC Machine, now it stands for Advanced RISC Machine.

ARM has a whole page on the benefits of its RISC architecture vs. traditional CISC designs:

Even when you click the ARM link in the original quote, it leads to AC's page on ARM that calls ARM a RISC architecture...
Oh my days! I wish I had been willing to click the article so I could have pointed that out lol.
 
OMG!!! What a massive failure in journalistic research! 😅 How can anybody call himself a senior editor at Android central when he proves not having the slightest idea about what he is writing..!? Of course Qualcomms ARM is a risk architecture. It was developed and launched 1982 by Acorn Risk Machine based in Oxford in the then first "BBC Computer". Their Risk concept was a counter concept to Intel's x86 CISC architecture. Without Risk the smartphone revolution would not have taken place because Cisk architecture is way too powerhungry for mobile devices.
 
Ummm, ARM isn't a CISC architecture. ARM originally stood for Acorn RISC Machine, now it stands for Advanced RISC Machine.

ARM has a whole page on the benefits of its RISC architecture vs. traditional CISC designs:

Even when you click the ARM link in the original quote, it leads to AC's page on ARM that calls ARM a RISC architecture...
so I clicked that URL and find that it was Jerry citing Jerry's own article explaining how ARM is RISC ... :rolleyes:
 

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